[PATCH 1/7] tools build: Add Makefile.include

From: Jiri Olsa
Date: Wed Sep 23 2015 - 06:34:21 EST


To ease up build framework code setup for users. More
shared code will be added in following patches.

Link: http://lkml.kernel.org/n/tip-p4hlxa0qh5ffkidq5e8jfne7@xxxxxxxxxxxxxx
Signed-off-by: Jiri Olsa <jolsa@xxxxxxxxxx>
---
tools/build/Documentation/Build.txt | 45 ++++++++++++++++++++++++++-----------
tools/build/Makefile.include | 1 +
tools/build/tests/ex/Makefile | 3 ++-
tools/lib/api/Makefile | 2 +-
tools/lib/bpf/Makefile | 2 +-
tools/lib/lockdep/Makefile | 2 +-
tools/perf/Makefile.perf | 2 +-
7 files changed, 39 insertions(+), 18 deletions(-)
create mode 100644 tools/build/Makefile.include

diff --git a/tools/build/Documentation/Build.txt b/tools/build/Documentation/Build.txt
index aa5e092c4352..88824359d595 100644
--- a/tools/build/Documentation/Build.txt
+++ b/tools/build/Documentation/Build.txt
@@ -11,8 +11,9 @@ Unlike the kernel we don't have a single build object 'obj-y' list that where
we setup source objects, but we support more. This allows one 'Build' file to
carry a sources list for multiple build objects.

-a) Build framework makefiles
-----------------------------
+
+Build framework makefiles
+-------------------------

The build framework consists of 2 Makefiles:

@@ -23,7 +24,7 @@ While the 'Build.include' file contains just some generic definitions, the
'Makefile.build' file is the makefile used from the outside. It's
interface/usage is following:

- $ make -f tools/build/Makefile srctree=$(KSRC) dir=$(DIR) obj=$(OBJECT)
+ $ make -f tools/build/Makefile.build srctree=$(KSRC) dir=$(DIR) obj=$(OBJECT)

where:

@@ -38,8 +39,9 @@ called $(OBJECT)-in.o:

which includes all compiled sources described in 'Build' makefiles.

-a) Build makefiles
-------------------
+
+Build makefiles
+---------------

The user supplies 'Build' makefiles that contains a objects list, and connects
the build to nested directories.
@@ -95,8 +97,24 @@ It's only a matter of 2 single commands to create the final binaries:

You can check the 'ex' example in 'tools/build/tests/ex' for more details.

-b) Rules
---------
+
+Makefile.include
+----------------
+
+The tools/build/Makefile.include makefile could be included
+via user makefiles to get usefull definitions.
+
+It defines following interface:
+
+ - build macro definition:
+ build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+
+ to make it easier to invoke build like:
+ make $(build)=ex
+
+
+Rules
+-----

The build framework provides standard compilation rules to handle .S and .c
compilation.
@@ -104,8 +122,9 @@ compilation.
It's possible to include special rule if needed (like we do for flex or bison
code generation).

-c) CFLAGS
----------
+
+CFLAGS
+------

It's possible to alter the standard object C flags in the following way:

@@ -115,8 +134,8 @@ It's possible to alter the standard object C flags in the following way:
This C flags changes has the scope of the Build makefile they are defined in.


-d) Dependencies
----------------
+Dependencies
+------------

For each built object file 'a.o' the '.a.cmd' is created and holds:

@@ -130,8 +149,8 @@ All existing '.cmd' files are included in the Build process to follow properly
the dependencies and trigger a rebuild when necessary.


-e) Single rules
----------------
+Single rules
+------------

It's possible to build single object file by choice, like:

diff --git a/tools/build/Makefile.include b/tools/build/Makefile.include
new file mode 100644
index 000000000000..91bc60616de5
--- /dev/null
+++ b/tools/build/Makefile.include
@@ -0,0 +1 @@
+build := -f $(srctree)/tools/build/Makefile.build dir=. obj
diff --git a/tools/build/tests/ex/Makefile b/tools/build/tests/ex/Makefile
index 52d2476073a3..a8f596e37fd2 100644
--- a/tools/build/tests/ex/Makefile
+++ b/tools/build/tests/ex/Makefile
@@ -3,7 +3,8 @@ export CC := gcc
export LD := ld
export AR := ar

-build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+include $(srctree)/tools/build/Makefile.include
+
ex: ex-in.o libex-in.o
gcc -o $@ $^

diff --git a/tools/lib/api/Makefile b/tools/lib/api/Makefile
index fe1b02c2c95b..8806ea7c2f99 100644
--- a/tools/lib/api/Makefile
+++ b/tools/lib/api/Makefile
@@ -21,10 +21,10 @@ CFLAGS += -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64

RM = rm -f

-build := -f $(srctree)/tools/build/Makefile.build dir=. obj
API_IN := $(OUTPUT)libapi-in.o

export srctree OUTPUT CC LD CFLAGS V
+include $(srctree)/tools/build/Makefile.include

all: $(LIBFILE)

diff --git a/tools/lib/bpf/Makefile b/tools/lib/bpf/Makefile
index e630f9fc4fb6..c66ade68d4a1 100644
--- a/tools/lib/bpf/Makefile
+++ b/tools/lib/bpf/Makefile
@@ -124,7 +124,7 @@ endif
MAKEOVERRIDES=

export srctree OUTPUT CC LD CFLAGS V
-build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+include $(srctree)/tools/build/Makefile.include

BPF_IN := $(OUTPUT)libbpf-in.o
LIB_FILE := $(addprefix $(OUTPUT),$(LIB_FILE))
diff --git a/tools/lib/lockdep/Makefile b/tools/lib/lockdep/Makefile
index 18ffccf00426..d12081da383b 100644
--- a/tools/lib/lockdep/Makefile
+++ b/tools/lib/lockdep/Makefile
@@ -94,7 +94,7 @@ else
endif

export srctree OUTPUT CC LD CFLAGS V
-build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+include $(srctree)/tools/build/Makefile.include

do_compile_shared_library = \
($(print_shared_lib_compile) \
diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf
index 6c5c699002cb..6dec86665acc 100644
--- a/tools/perf/Makefile.perf
+++ b/tools/perf/Makefile.perf
@@ -297,7 +297,7 @@ strip: $(PROGRAMS) $(OUTPUT)perf
PERF_IN := $(OUTPUT)perf-in.o

export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX AWK
-build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+include $(srctree)/tools/build/Makefile.include

$(PERF_IN): $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h FORCE
$(Q)$(MAKE) $(build)=perf
--
2.4.3

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