RE: [PATCH 0/6] MIPS CPS SMP fixes, debug & cleanups

[Govindraj Raja]

Hi Paul / Rafl,

> -----Original Message-----
> From: linux-mips-bounce@xxxxxxxxxxxxxx [mailto:linux-mips-bounce@linux-
> mips.org] On Behalf Of Paul Burton
> Sent: 05 August 2015 11:43 PM
> To: linux-mips@xxxxxxxxxxxxxx
> Cc: Paul Burton; linux-kernel@xxxxxxxxxxxxxxx; James Hogan; Markos Chandras;
> Ralf Baechle
> Subject: [PATCH 0/6] MIPS CPS SMP fixes, debug & cleanups
> 
> This series fixes a few issues with the MIPS Coherent Processing System SMP
> implementation, provides some extra capabilities with regards to debug and does
> a little spring cleaning. A couple of the issues fixed were introduced in v4.1-rc1
> and (spuriously) marked for stable backports as far as v3.16, so the fixes in this
> series are marked likewise.
> 
> Applies atop v4.2-rc5.
> 
> Paul Burton (6):
>   MIPS: CPS: use 32b accesses to GCRs
>   MIPS: CPS: stop dangling delay slot from has_mt
>   MIPS: CPS: don't include MT code in non-MT kernels
>   MIPS: CPS: #ifdef on CONFIG_MIPS_MT_SMP rather than CONFIG_MIPS_MT
>   MIPS: CONFIG_MIPS_MT_SMP should depend upon CPU_MIPSR2
>   MIPS: CPS: drop .set mips64r2 directives
> 
>  arch/mips/Kconfig          |  2 +-
>  arch/mips/kernel/cps-vec.S | 18 +++++++++---------
>  2 files changed, 10 insertions(+), 10 deletions(-)

I just boot tested on Pistachio Platform (MIPS interAptiv (multi) (32)).
Without this patch series boot is broken for pistachio platform for 4.2-rc5.

--
Thanks,
Govindraj.R
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