Re: [PATCH] x86, pat: Add comments to cachemode translation tables

[Thomas Gleixner]

On Thu, 23 Jul 2015, Toshi Kani wrote:
> On Thu, 2015-07-23 at 09:36 -0600, Jan Beulich wrote:
> > > 
> > > > > On 23.07.15 at 17:25, <toshi.kani@xxxxxx> wrote:
> > > Yes, I agree with you.  But such risk is very low -- 1) the regular 
> > > case
> > > (no fallback) is used most of the cases, 2) the code using WT knows 
> > > what
> > > type of memory it is dealing with.  For example, pmem may map NVDIMM 
> > > with
> > > WT, and any sane BIOS sets MTRR to WB for NVDIMM. 
> > 
> > Do the words "sane" and "BIOS" really fit together in your opinion?
> 
> :-)
> 
> Anyway, I am not disagreeing with you... When UC is ready for both regular
> memory and IO memory, it should be changed to fall back to UC.

What's the resolution of this discussion? Is that patch correct as is
or do we get an updated version?

Thanks,

	tglx
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