[PATCH 01/18] asm-generic: io: implement relaxed accessor macros as conditional wrappers

From: Will Deacon
Date: Thu Apr 17 2014 - 09:47:05 EST


{read,write}{b,w,l,q}_relaxed are implemented by some architectures in
order to permit memory-mapped I/O accesses with weaker barrier semantics
than the non-relaxed variants.

This patch adds wrappers to asm-generic so that drivers can rely on the
relaxed accessors being available, even if they don't always provide
weaker ordering guarantees. Since some architectures both include
asm-generic/io.h and define some relaxed accessors, the definitions here
are conditional for the time being.

Cc: Arnd Bergmann <arnd@xxxxxxxx>
Signed-off-by: Will Deacon <will.deacon@xxxxxxx>
---
include/asm-generic/io.h | 41 ++++++++++++++++++++++++++++++++++-------
1 file changed, 34 insertions(+), 7 deletions(-)

diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index 975e1cc75edb..6a93889aeb0d 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -52,15 +52,24 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
}
#endif

-#define readb __raw_readb
+#define readb __raw_readb
+#ifndef readb_relaxed
+#define readb_relaxed readb
+#endif

-#define readw readw
+#define readw readw
+#ifndef readw_relaxed
+#define readw_relaxed readw
+#endif
static inline u16 readw(const volatile void __iomem *addr)
{
return __le16_to_cpu(__raw_readw(addr));
}

-#define readl readl
+#define readl readl
+#ifndef readl_relaxed
+#define readl_relaxed readl
+#endif
static inline u32 readl(const volatile void __iomem *addr)
{
return __le32_to_cpu(__raw_readl(addr));
@@ -87,9 +96,21 @@ static inline void __raw_writel(u32 b, volatile void __iomem *addr)
}
#endif

-#define writeb __raw_writeb
-#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
-#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
+#define writeb __raw_writeb
+#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
+#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
+
+#ifndef writeb_relaxed
+#define writeb_relaxed writeb
+#endif
+
+#ifndef writew_relaxed
+#define writew_relaxed writew
+#endif
+
+#ifndef writel_relaxed
+#define writel_relaxed writel
+#endif

#ifdef CONFIG_64BIT
#ifndef __raw_readq
@@ -99,7 +120,10 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
}
#endif

-#define readq readq
+#define readq readq
+#ifndef readq_relaxed
+#define readq_relaxed readq
+#endif
static inline u64 readq(const volatile void __iomem *addr)
{
return __le64_to_cpu(__raw_readq(addr));
@@ -113,6 +137,9 @@ static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
#endif

#define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr)
+#ifndef writeq_relaxed
+#define writeq_relaxed writeq
+#endif
#endif /* CONFIG_64BIT */

#ifndef PCI_IOBASE
--
1.9.1

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