Re: [PATCH v3 1/2] regulator: anatop: Add power gating support to digital LDOs
From: Mark Brown
Date: Sat Feb 15 2014 - 05:09:58 EST
On Tue, Feb 11, 2014 at 02:43:44PM +0100, Philipp Zabel wrote:
> The ARM, PU, and SOC LDOs in the i.MX6 PMU can completely gate
> their power output. Since power gating is configured by writing
> zero to the voltage target bitfield,, store a copy of the
> voltage selector to be restored when reenabling the regulator.
Applied both, thanks.
Attachment:
signature.asc
Description: Digital signature