Re: [PATCH v2 6/8] perf/x86/uncore: add SNB/IVB/HSW client uncore memory controller support

From: Peter Zijlstra
Date: Tue Feb 11 2014 - 11:19:24 EST


On Tue, Feb 11, 2014 at 04:20:12PM +0100, Stephane Eranian wrote:
> This patch adds a new uncore PMU for Intel SNB/IVB/HSW client


> @@ -3501,6 +3844,28 @@ static int __init uncore_pci_init(void)
> pci_uncores = ivt_pci_uncores;
> uncore_pci_driver = &ivt_uncore_pci_driver;
> break;
> + case 42: /* Sandy Bridge */
> + ret = snb_pci2phy_map_init(PCI_DEVICE_ID_INTEL_SNB_IMC);
> + if (ret)
> + return ret;
> + pci_uncores = snb_pci_uncores;
> + uncore_pci_driver = &snb_uncore_pci_driver;
> + break;
> + case 60: /* Haswell */
> + case 69: /* Haswell Celeron */
> + ret = snb_pci2phy_map_init(PCI_DEVICE_ID_INTEL_HSW_IMC);
> + if (ret)
> + return ret;
> + pci_uncores = snb_pci_uncores;
> + uncore_pci_driver = &hsw_uncore_pci_driver;
> + break;
> + case 58: /* Ivy Bridge */
> + ret = snb_pci2phy_map_init(PCI_DEVICE_ID_INTEL_IVB_IMC);
> + if (ret)
> + return ret;
> + pci_uncores = snb_pci_uncores;
> + uncore_pci_driver = &ivb_uncore_pci_driver;
> + break;
> default:
> return 0;
> }

I reorderd that list; but looking at perf_event_intel.c we have a lot
more HSW clients listed there. Plz as to make it consistent.
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