Re: [x86] BUG: unable to handle kernel paging request at 00740060

[Peter Zijlstra]

On Wed, Oct 09, 2013 at 04:07:34PM +0200, Peter Zijlstra wrote:
> Once I force a x86_64 build using the 'same' config it goes away and
> generates 'sensible' code again (although I don't see why L9 isn't
> merged with L2):

i386-SMP also generates correct code afaict; a tad stupid but not wrong.

If I remove ftrace from the .config its still broken..
If I also remove the likely/unlikely tracer its still broken and lots
smaller:

        .p2align 4,,15
        .globl  task_work_add
        .type   task_work_add, @function
task_work_add:
        pushl   %ebp    #
        movl    %esp, %ebp      #,
        pushl   %edi    #
        pushl   %esi    #
        pushl   %ebx    #
        movl    %eax, %esi      # task, task
        .p2align 4,,15
.L4:
        movl    904(%esi), %ebx # task_5(D)->task_works, __old
        cmpl    $work_exited, %ebx      #, __old
        je      .L5     #,
        movl    %ebx, (%edx)    # __old, work_10(D)->next
        movl    %ebx, %eax      # __old, __ret
#APP
# 34 "/usr/src/linux-2.6/kernel/task_work.c" 1
        cmpxchgl %edx,904(%esi) # work, *__ptr_12
# 0 "" 2
#NO_APP
        cmpl    %eax, %ebx      # __ret, __old
        jne     .L4     #,
        testb   %cl, %cl        # notify
        je      .L6     #,
        movl    4(%esi), %eax   # task_5(D)->stack, task_5(D)->stack
#APP
# 208 "/usr/src/linux-2.6/arch/x86/include/asm/bitops.h" 1
        bts $1, 8(%eax); jc .L2 #, MEM[(volatile long unsigned int *)_18],
# 0 "" 2
#NO_APP
.L6:
        xorl    %edi, %edi      # D.14172
.L2:
        movl    %edi, %eax      # D.14172,
        popl    %ebx    #
        popl    %esi    #
        popl    %edi    #
        popl    %ebp    #
        ret
.L5:
        movl    $-3, %edi       #, D.14172
        jmp     .L2     #
        .size   task_work_add, .-task_work_add

That "jc .L2" needs to be .L6 ! It looks like it fails to deal with the
empty branch.

Why this thing needs to use EDI is anybodies guess I suppose. Would've
made much more sense to have:

.L6:
	xorl %eax, %eax
.L2:
	popl %ebx
	popl %esi
	popl %ebp
	ret
.L5:
	movl, $-3, %eax
	jmp .L2

At least its not duplicating the popl+ret bits 3 times anymore.
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