Re: [Results] [RFC PATCH v4 00/40] mm: Memory Power Management

From: Srivatsa S. Bhat
Date: Thu Sep 26 2013 - 09:47:19 EST

On 09/26/2013 08:29 AM, Andrew Morton wrote:
> On Thu, 26 Sep 2013 03:50:16 +0200 Andi Kleen <andi@xxxxxxxxxxxxxx> wrote:
>> On Wed, Sep 25, 2013 at 06:21:29PM -0700, Andrew Morton wrote:
>>> On Wed, 25 Sep 2013 18:15:21 -0700 Arjan van de Ven <arjan@xxxxxxxxxxxxxxx> wrote:
>>>> On 9/25/2013 4:47 PM, Andi Kleen wrote:
>>>>>> Also, the changelogs don't appear to discuss one obvious downside: the
>>>>>> latency incurred in bringing a bank out of one of the low-power states
>>>>>> and back into full operation. Please do discuss and quantify that to
>>>>>> the best of your knowledge.
>>>>> On Sandy Bridge the memry wakeup overhead is really small. It's on by default
>>>>> in most setups today.
>>>> btw note that those kind of memory power savings are content-preserving,
>>>> so likely a whole chunk of these patches is not actually needed on SNB
>>>> (or anything else Intel sells or sold)
>>> (head spinning a bit). Could you please expand on this rather a lot?
>> As far as I understand there is a range of aggressiveness. You could
>> just group memory a bit better (assuming you can sufficiently predict
>> the future or have some interface to let someone tell you about it).
>> Or you can actually move memory around later to get as low footprint
>> as possible.
>> This patchkit seems to do both, with the later parts being on the
>> aggressive side (move things around)
>> If you had non content preserving memory saving you would
>> need to be aggressive as you couldn't afford any mistakes.
>> If you had very slow wakeup you also couldn't afford mistakes,
>> as those could cost a lot of time.
>> On SandyBridge is not slow and it's preserving, so some mistakes are ok.
>> But being aggressive (so move things around) may still help you saving
>> more power -- i guess only benchmarks can tell. It's a trade off between
>> potential gain and potential worse case performance regression.
>> It may also depend on the workload.
>> At least right now the numbers seem to be positive.
> OK. But why are "a whole chunk of these patches not actually needed on SNB
> (or anything else Intel sells or sold)"? What's the difference between
> Intel products and whatever-it-is-this-patchset-was-designed-for?

Arjan, are you referring to the fact that Intel/SNB systems can exploit
memory self-refresh only when the entire system goes idle? Is that why this
patchset won't turn out to be that useful on those platforms?

Srivatsa S. Bhat

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