Re: [PATCH 3/4] AHCI: Conserve interrupts withpci_enable_msi_block_part() interface

[Alexander Gordeev]

On Tue, Sep 03, 2013 at 02:27:31PM -0400, Tejun Heo wrote: > Hello,
> 
> On Tue, Sep 03, 2013 at 06:19:06PM +0200, Alexander Gordeev wrote:
> > We must enable maximum possible number of MSIs - the one reported in
> > Multiple Message Capable register. Otherwise ICH device will fallback
> > to MRSM. IOW, if the result of roundup_pow_of_two(n_ports) is not what
> > in Multiple Message Capable register (i.e. as roundup_pow_of_two(6) vs 16)
> > ICH will enforce MRSM mode.
> 
> Hmmm... I think the interface in general is pretty messy.  Wouldn't it
> be much cleaner to have a separate function to query MSICAP and let
> the function just return success / failure?

Actually, sorry for misleading. It is only ICH (I am aware of) that works
this way and I was focused on.

I think a general approach that will cover it all (including ICH and undesired
sharing of interrupt vectors) - start MME from roundup_pow_of_two(n_ports) and
ensure MRSM bit is unset. If not - double MME and retry. If still not and the
limit is reached - fall back to single MSI.

Makes sense?

> Thanks.
> 
> -- 
> tejun

-- 
Regards,
Alexander Gordeev
agordeev@xxxxxxxxxx
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