[ 21/72] parisc: document the shadow registers

From: Greg Kroah-Hartman
Date: Fri Jul 19 2013 - 01:42:48 EST


3.10-stable review patch. If anyone has any objections, please let me know.

------------------

From: Helge Deller <deller@xxxxxx>

commit a83f58bcb24003b9de2364de7c829a263423ead7 upstream.

Signed-off-by: Helge Deller <deller@xxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
Documentation/parisc/registers | 8 ++++++++
1 file changed, 8 insertions(+)

--- a/Documentation/parisc/registers
+++ b/Documentation/parisc/registers
@@ -78,6 +78,14 @@ Shadow Registers used by interruption h
TOC enable bit 1

=========================================================================
+
+The PA-RISC architecture defines 7 registers as "shadow registers".
+Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce
+the state save and restore time by eliminating the need for general register
+(GR) saves and restores in interruption handlers.
+Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25.
+
+=========================================================================
Register usage notes, originally from John Marvin, with some additional
notes from Randolph Chung.



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