[PATCH v2 3/4] binding: Add device tree bindings for freescale AIC

From: akhil.goyal
Date: Mon Jul 08 2013 - 05:51:28 EST


From: Akhil Goyal <akhil.goyal@xxxxxxxxxxxxx>

For platforms like BSC9131 and BSC9132, a Radio framework for supporting
various network modes comprise of an Antenna interface controller driver
and a phy driver.
A combination of AIC lane and phy is called a rf device which can be used
to operate on a particular network mode.

This patch explain various device tree properties required for AIC driver

Signed-off-by: Akhil Goyal <akhil.goyal@xxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/rf/fsl-aic.txt | 47 ++++++++++++++++++++++
1 files changed, 47 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/rf/fsl-aic.txt

diff --git a/Documentation/devicetree/bindings/rf/fsl-aic.txt b/Documentation/devicetree/bindings/rf/fsl-aic.txt
new file mode 100644
index 0000000..4f54a92
--- /dev/null
+++ b/Documentation/devicetree/bindings/rf/fsl-aic.txt
@@ -0,0 +1,47 @@
+Freescale Antenna Interface Controller
+
+AIC is the antenna interface controller found in bsc913x
+family of SOCs. It supports NCDMA, WCDMA-FDD, LTE-FDD, LTE-TDD
+and GSM-SNIFF network modes. AIC has multiple lanes on which RFICs
+can be connected. And AIC supports 4 RFICs working simultaneously.
+
+Required Properties:
+- #address-cells : should be 1
+- #size-cells : should be 1
+- compatible : should be fsl,bsc9131-aic or fsl,bsc9132-aic or both
+- reg : offset and length of common register set of AIC
+- interrupts : For AIC, first is capture complete interrupt
+ second is dsp general interrupt
+aic node can have multiple sub nodes of aiclanes for each lane.
+- aiclane : Required Properties
+ - reg : offset and length of common register set of AIC lane
+ - lane_id : it can be 0, 1, 2, 3, 4, 5
+ - interrupts : lane specific TTI interrupt line
+
+For Example:
+
+aic@50000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,bsc9131-aic", "fsl,bsc9132-aic";
+ reg = <0x50000 0x200>;
+ interrupts = <49 2 0 0 53 2 0 0>;
+ lane0: aiclane@200 {
+ reg = <0x200 0x200>;
+ lane_id = <0>;
+ interrupts = <45 2 0 0>;
+ };
+
+ lane1: aiclane@400 {
+ reg = <0x400 0x200>;
+ lane_id = <1>;
+ interrupts = <46 2 0 0>;
+ };
+
+ lane2: aiclane@600 {
+ reg = <0x600 0x200>;
+ lane_id = <2>;
+ interrupts = <47 2 0 0>;
+ };
+};
+
--
1.6.3.1



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