irqchip: sirfsoc: Question about SIRFSOC_NUM_IRQS setting

[Axel Lin]

irq_setup_generic_chip() setup max. 32 interrupts starting from gc->irq_base.

sirfsoc_irq_init()
  -> sirfsoc_alloc_gc()
    -> irq_setup_generic_chip()

In sirfsoc_irq_init(), current code calls
sirfsoc_alloc_gc(base + 4, 32, SIRFSOC_NUM_IRQS - 32); //Note, SIRFSOC_NUM_IRQS is 128

So I'm wondering if SIRFSOC_NUM_IRQS setting is correct or not.

PS. In initial commit 02c981c07bc95ac1e "ARM: CSR: Adding CSR SiRFprimaII board support"
SIRFSOC_INTENAL_IRQ_END is 59.

Regards,
Axel




--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/