Re: power-efficient scheduling design

[Benjamin Herrenschmidt]

On Mon, 2013-06-24 at 08:26 -0700, Arjan van de Ven wrote:
> 
> to bring the system back up if all cores in the whole system are idle and power gated,
> memory in SR etc... is typically < 250 usec (depends on the exact version
> of the cpu etc). But the moment even one core is running, that core will keep the system
> out of such deep state, and waking up a consecutive entity is much faster
> 
> to bring just a core out of power gating is more in the 40 to 50 usec range

Out of curiosity, what happens to PCIe when you bring a package down
like this ?

Cheers,
Ben.


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