[PATCH 4/7] metag: tz1090: select and instantiate pinctrl-tz1090

[James Hogan]

Select PINCTRL and PINCTRL_TZ1090 from SOC_TZ1090 to enable the main pin
controller driver once it is merged, and instantiate it from
tz1090.dtsi.

Signed-off-by: James Hogan <james.hogan@xxxxxxxxxx>
Cc: Linus Walleij <linus.walleij@xxxxxxxxxx>
---
 arch/metag/Kconfig.soc          | 2 ++
 arch/metag/boot/dts/tz1090.dtsi | 6 ++++++
 2 files changed, 8 insertions(+)

diff --git a/arch/metag/Kconfig.soc b/arch/metag/Kconfig.soc
index 433befd..944dc30 100644
--- a/arch/metag/Kconfig.soc
+++ b/arch/metag/Kconfig.soc
@@ -20,6 +20,8 @@ config SOC_TZ1090
 	select METAG_LNKGET_AROUND_CACHE
 	select METAG_META21
 	select METAG_SMP_WRITE_REORDERING
+	select PINCTRL
+	select PINCTRL_TZ1090
 	help
 	  This is a Toumaz Technology Xenif TZ1090 (A.K.A. Comet) SoC containing
 	  a 2-threaded HTP.
diff --git a/arch/metag/boot/dts/tz1090.dtsi b/arch/metag/boot/dts/tz1090.dtsi
index 0ed8023..f9cb189 100644
--- a/arch/metag/boot/dts/tz1090.dtsi
+++ b/arch/metag/boot/dts/tz1090.dtsi
@@ -43,5 +43,11 @@
 			             <29 IRQ_TYPE_LEVEL_HIGH>, /* Perip 1 (IR) */
 			             <31 IRQ_TYPE_LEVEL_HIGH>; /* Perip 2 (WDT) */
 		};
+
+		pinctrl: pinctrl@02005800 {
+			#gpio-range-cells = <3>;
+			compatible = "img,tz1090-pinctrl";
+			reg = <0x02005800 0xe4>;
+		};
 	};
 };
-- 
1.8.1.2


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