[PATCH] virtio-spec: Clarify virtio-mmio configuration space organisation

[Pawel Moll]

To clarify potential confusion regarding the configuration
space organisation (endianness in particular) the spec
should clearly state that it follows the PCI device behaviour.

Signed-off-by: Pawel Moll <pawel.moll@xxxxxxx>
---
 virtio-spec.lyx |   22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/virtio-spec.lyx b/virtio-spec.lyx
index a00b675..2fba0b0 100644
--- a/virtio-spec.lyx
+++ b/virtio-spec.lyx
@@ -696,6 +696,17 @@ rproc serial
 
 \begin_layout Section
 Device Configuration
+\change_inserted -875410574 1362141102
+
+\begin_inset CommandInset label
+LatexCommand label
+name "sec:Device-Configuration"
+
+\end_inset
+
+
+\change_unchanged
+
 \end_layout
 
 \begin_layout Standard
@@ -9865,7 +9876,7 @@ a
 
 \change_deleted -875410574 1360838214
 The endianness of the registers follows the native endianness of the Guest.
-\change_inserted -875410574 1360838930
+\change_inserted -875410574 1362141146
 All register values are organized as Little Endian, similarly to the PCI
  variant, see also 
 \begin_inset CommandInset ref
@@ -9875,6 +9886,15 @@ reference "sub:Virtqueue-Endianness"
 \end_inset
 
 .
+ The device-specific configuration space organisation follows the PCI device
+ specification, see
+\begin_inset CommandInset ref
+LatexCommand ref
+reference "sec:Device-Configuration"
+
+\end_inset
+
+.
  
 \change_deleted -875410574 1360838262
  
-- 
1.7.10.4




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