Re: [PATCH] perf x86: Change SandyBridge and IvyBrige instructionsevent to be precise

From: Stephane Eranian
Date: Wed Feb 20 2013 - 16:01:38 EST

On Wed, Feb 20, 2013 at 9:55 PM, Andi Kleen <andi@xxxxxxxxxxxxxx> wrote:
> Jiri Olsa <jolsa@xxxxxxxxxx> writes:
>> Changing the default 'instructions' HW event for SandyBridge and
>> IvyBrige to use the available precise 'instructions' event.
>> The precise event is defined in Intel SDM as:
>> INST_RETIRED.ALL - Precise instruction retired event with HW to
>> reduce effect of PEBS shadow in IP distribution
>> for both SandyBridge and IvyBrige micro-archs. It allows to use
>> precise modifier on 'instructions' event on SandyBridge and
>> IvyBrige micro-archs which is not possible now.
There is also the problem that on SNB, PREC_DIST must be
taken ALONE to be correct. By that, I mean no other counter
must be active. So I don't think it is a good idea.

Also PREC_DIST is marked as constrained to counter 2 only.
That in effect, as Andi pointed out, will make the fixed counter
for instruction_retired, unused because you've set a umask now.

I don't think it buys you much. People read too much into what
PEBS gives you. I can show you examples where PEBS
is worse than no PEBS.

> Actually it's possible, you just have to use it explicitely.
> This will break a lot of profiling setups that assume instructions
> count on the fixed counter and use the 4/8 other counters.
> Also it will give very bad results with perf stat, which
> you don't want to run with pebs.
> Even worse with your change the fixed instruction counter is not
> accessible anymore. So pretty much all the standard setups
> that collect it in addition to other events and fill all
> the counters would break.
> I don't think it should be done by default, but yes explicitely
> it's quite useful.
> My Haswell patchkit (in the "extended version") exposes
> the precise event as "instructions-p" through sysfs.
> -Andi
> --
> ak@xxxxxxxxxxxxxxx -- Speaking for myself only
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