On Thu, Feb 7, 2013 at 2:39 PM, Grant Likely <grant.likely@xxxxxxxxxxxx> wrote:On Wed, Feb 6, 2013 at 9:35 PM, Benjamin Herrenschmidt
<benh@xxxxxxxxxxxxxxxxxxx> wrote:
In fact, the driver already knows about this and figures
out at runtime how the device is wired up to the bus. This is not the
problem.
Except that this is very gross, especially when you observe that in the
busted "big endian" case, it has to byteswap the bloody data port.
So you end up having to do that gross hack with separate accessors for
registers vs. data and not able to use the _rep variants, which also
means that on platforms like ppc, you end up with a memory barrier on
every access (or more), which is going to slow things down enormously.
I don't see why the _rep variants aren't usable here. The only reason
I didn't use them when I wrote the driver in the first place was I was
a n00b kernel hacker and I didn't know they were there.
The 8-bit variant is different though because the hardware requires
pingponging between odd and even byte addresses to flush the fifo.
Reading a data port even address (0x40) gives the least significant
byte. Reading from an odd address (0x41) give the MSB and pops the
data off the FIFO. So, yes, the _rep variant can't be used in 8-bit
mode. It should still be fine in 16-bit.
page 45: http://www.xilinx.com/support/documentation/data_sheets/ds080.pdf