Re: i915-related and general system freezes with specific kernelconfig // IOMMU

From: Daniel Vetter
Date: Sat Jan 19 2013 - 11:25:28 EST


On Sat, Jan 19, 2013 at 5:13 PM, Mihai Moldovan <ionic@xxxxxxxx> wrote:
>> [...] and we've never added the proper
>> quirks. See https://bugzilla.kernel.org/show_bug.cgi?id=51921 for a
>> proposed patch to fix this (i.e. automatically set
>> intel_iommu=igfx_off for affected platfroms). Testing highly welcome.
>
> From a quick glance, I don't think this patch will work as-is, my PCI ID 2e12 is
> missing.
> I'll add it to the relevant section.

The quirk matches your pci host bridge, which should have id 2e10, not
the gfx, which has id 2e12.

> But even if it worked, I'd still have the "box freezes randomly" issue (mostly
> within 5 to 60 minutes of uptime). :(
> The only way to get rid of this is disabling Intel IOMMU as a whole via kernel
> parameters intel_iommu=off iommu=off.

Hm, can you try enabling the related iommu quirk:

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index b9d0911..e834395 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -4251,6 +4251,7 @@ static void quirk_iommu_rwbf(struct pci_dev *dev)
}

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_rwbf);

#define GGC 0x52
#define GGC_MEMORY_SIZE_MASK (0xf << 8)

Cheers, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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