[PATCH] ata: sata_mv: fix sg_tbl_pool alignment

[Jason Cooper]

If the comment is to be believed, the alignment should be 16B, and the
size 4K.  The current code sets both to 4K.  On some arm boards
(kirkwood), this causes:

   ERROR: 1024 KiB atomic DMA coherent pool is too small!
   Please increase it with coherent_pool= kernel parameter!

Set alignment to 16B to prevent exhausting the atomic_pool.

Signed-off-by: Jason Cooper <jason@xxxxxxxxxxxxxx>
---
 drivers/ata/sata_mv.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 68f4fb5..e2e5a8a 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -148,6 +148,9 @@ enum {
 	 * CRPB needs alignment on a 256B boundary. Size == 256B
 	 * ePRD (SG) entries need alignment on a 16B boundary. Size == 16B
 	 */
+	MV_CRQB_Q_ALIGN		= 1024,
+	MV_CRPB_Q_ALIGN		= 256,
+	MV_SG_TBL_ALIGN		= 16,
 	MV_CRQB_Q_SZ		= (32 * MV_MAX_Q_DEPTH),
 	MV_CRPB_Q_SZ		= (8 * MV_MAX_Q_DEPTH),
 	MV_MAX_SG_CT		= 256,
@@ -3975,17 +3978,17 @@ done:
 static int mv_create_dma_pools(struct mv_host_priv *hpriv, struct device *dev)
 {
 	hpriv->crqb_pool   = dmam_pool_create("crqb_q", dev, MV_CRQB_Q_SZ,
-							     MV_CRQB_Q_SZ, 0);
+							MV_CRQB_Q_ALIGN, 0);
 	if (!hpriv->crqb_pool)
 		return -ENOMEM;
 
 	hpriv->crpb_pool   = dmam_pool_create("crpb_q", dev, MV_CRPB_Q_SZ,
-							     MV_CRPB_Q_SZ, 0);
+							MV_CRPB_Q_ALIGN, 0);
 	if (!hpriv->crpb_pool)
 		return -ENOMEM;
 
 	hpriv->sg_tbl_pool = dmam_pool_create("sg_tbl", dev, MV_SG_TBL_SZ,
-							     MV_SG_TBL_SZ, 0);
+							MV_SG_TBL_ALIGN, 0);
 	if (!hpriv->sg_tbl_pool)
 		return -ENOMEM;
 
-- 
1.8.1.1

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