Re: [PATCH] Round the calculated scale factor in set_cyc2ns_scale()

[John Stultz]

On 12/05/2012 06:16 AM, Bernd Faust wrote:
> During some experiments with an external clock (in a FPGA), we saw that
> the TSC clock drifted approx. 2.5ms per second.
>
> This drift was caused by the current way of calculating the scale.
> In our case cpu_khz had a value of 3292725. This resulted in a scale
> value of 310. But when doing the calculation by hand it shows that the
> actual value is 310.9886188491, so a value of 311 would be more precise.
>
> With this change the value is rounded.
>
> Signed-off-by: Bernd Faust <berndfaust@xxxxxxxxx>

Thanks for sending this in! I've queued it, but because I was slow here, 
it will have to wait for 3.9.

Sorry for the delay, and thanks again!
-john

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