On Thu, Oct 25, 2012 at 6:11 PM, Murali Karicheri <m-karicheri2@xxxxxx> wrote:Linus,
This is the driver for the Power Sleep Controller (PSC) hardwareAcked-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
found on DM SoCs as well Keystone SoCs (c6x). This driver borrowed
code from arch/arm/mach-davinci/psc.c and implemented the driver
as per common clock provider API. The PSC module is responsible for
enabling/disabling the Power Domain and Clock domain for different IPs
present in the SoC. The driver is configured through the clock data
passed to the driver through struct clk_psc_data.
Signed-off-by: Murali Karicheri <m-karicheri2@xxxxxx>
Here is some pedantic stuff if you're really bored:
diff --git a/drivers/clk/davinci/clk-psc.c b/drivers/clk/davinci/clk-psc.c(...)+ ptcmd = 1 << domain;ptcmd = BIT(domain);
+ pdctl = readl(psc_base + PDCTL + 4 * domain);pdctl |= BIT(8); /* and here a comment explaing what on earth that means */
+ pdctl |= 0x100;
+ } else {ptcmd = BIT(domain);
+ ptcmd = 1 << domain;
Yours,
Linus Walleij