Re: [PATCH] avr32: fix build error in atstk1006_defconfig

[Josh Wu]

On 10/16/2012 5:17 PM, Hans-Christian Egtvedt wrote:
> Around Tue 16 Oct 2012 15:19:27 +0800 or thereabout, Josh Wu wrote:
> > fixed the following compile error when use avr32 atstk1006_defconfig:
> >    drivers/mtd/nand/atmel_nand.c: In function 'pmecc_err_location':
> >    drivers/mtd/nand/atmel_nand.c:639: error: implicit declaration of function 'writel_relaxed'
> >
> > which was introduced by commit 1c7b874d33b463 ("mtd: at91: atmel_nand: add Programmable Multibit ECC controller support").
> > The PMECC for nand flash code uses writel_relaxed(). But in avr32, there is no macro "writel_relaxed" defined. This patch add writex_relaxed macro definitions.
> >
> > Signed-off-by: Josh Wu <josh.wu@xxxxxxxxx>
> > ---
> >   arch/avr32/include/asm/io.h |    4 ++++
> >   1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h
> > index cf60d0a..fc6483f 100644
> > --- a/arch/avr32/include/asm/io.h
> > +++ b/arch/avr32/include/asm/io.h
> > @@ -165,6 +165,10 @@ BUILDIO_IOPORT(l, u32)
> >   #define readw_be			__raw_readw
> >   #define readl_be			__raw_readl
> >   
> > +#define writeb_relaxed			writeb
> > +#define writew_relaxed			writew
> > +#define writel_relaxed			writel
> > +
> I'm wondering if they should be something similar to SH arch:
>
> #define writeb_relaxed(v,c) ((void)__raw_writeb((__force u8)ioswabb(v),c))
>
> What is the intention behind the macro? Which restriction is relaxed?

According to my understanding, the xxx_relaxed() is that I/O function 
without any memory barriers. for Multi-cpu, the execute order are less 
limited.
So the relaxed write function should be more effective than non-relaxed one.

But for single cpu, relaxed function should work same as non-relaxed 
function.
Please correct me if I'm understand in a wrong way.

Best Regards,
Josh Wu

> >   #define writeb_be			__raw_writeb
> >   #define writew_be			__raw_writew
> >   #define writel_be			__raw_writel

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