[PATCH v7 04/12] Don't offline CPU0 if any PIC irq can not be migrated out of it.

[Fenghua Yu]

From: Fenghua Yu <fenghua.yu@xxxxxxxxx>

Change smp_store_cpu_info() to store cpu info for a CPU when it's brought up.
This includes bringing up CPU0 or AP after it's offline. But don't store cpu
info when BSP first boots during boot time.

Continue to online CPU0 in native_cpu_up().

Signed-off-by: Fenghua Yu <fenghua.yu@xxxxxxxxx>
---
 arch/x86/include/asm/smp.h |    2 +-
 arch/x86/kernel/smpboot.c  |   32 +++++++++++---------------------
 2 files changed, 12 insertions(+), 22 deletions(-)

diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 4f19a15..0be0b29 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -166,7 +166,7 @@ void native_send_call_func_ipi(const struct cpumask *mask);
 void native_send_call_func_single_ipi(int cpu);
 void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle);
 
-void smp_store_cpu_info(int id);
+void smp_store_cpu_info(int id, int store);
 #define cpu_physical_id(cpu)	per_cpu(x86_cpu_to_apicid, cpu)
 
 #else /* !CONFIG_SMP */
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index c80a33b..8d0b4ff 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -125,8 +125,8 @@ EXPORT_PER_CPU_SYMBOL(cpu_info);
 atomic_t init_deasserted;
 
 /*
- * Report back to the Boot Processor.
- * Running on AP.
+ * Report back to the Boot Processor during boot time or to the caller processor
+ * during CPU online.
  */
 static void __cpuinit smp_callin(void)
 {
@@ -201,7 +201,7 @@ static void __cpuinit smp_callin(void)
 	 * Save our processor parameters. Note: this information
 	 * is needed for clock calibration.
 	 */
-	smp_store_cpu_info(cpuid);
+	smp_store_cpu_info(cpuid, 1);
 
 	/*
 	 * Get our bogomips.
@@ -283,14 +283,17 @@ notrace static void __cpuinit start_secondary(void *unused)
  * The bootstrap kernel entry code has set these up. Save them for
  * a given CPU
  */
-
-void __cpuinit smp_store_cpu_info(int id)
+void __cpuinit smp_store_cpu_info(int id, int store)
 {
 	struct cpuinfo_x86 *c = &cpu_data(id);
 
 	*c = boot_cpu_data;
 	c->cpu_index = id;
-	if (id != 0)
+	/*
+	 * During boot time, CPU0 has this setup already. Save the info when
+	 * bringing up AP or offlined CPU0.
+	 */
+	if (store)
 		identify_secondary_cpu(c);
 }
 
@@ -795,7 +798,7 @@ int __cpuinit native_cpu_up(unsigned int cpu, struct task_struct *tidle)
 
 	pr_debug("++++++++++++++++++++=_---CPU UP  %u\n", cpu);
 
-	if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
+	if (apicid == BAD_APICID ||
 	    !physid_isset(apicid, phys_cpu_present_map) ||
 	    !apic->apic_id_valid(apicid)) {
 		pr_err("%s: bad cpu %d\n", __func__, cpu);
@@ -990,7 +993,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 	/*
 	 * Setup boot CPU information
 	 */
-	smp_store_cpu_info(0); /* Final full version of the data */
+	smp_store_cpu_info(0, 0); /* Final full version of the data */
 	cpumask_copy(cpu_callin_mask, cpumask_of(0));
 	mb();
 
@@ -1214,19 +1217,6 @@ void cpu_disable_common(void)
 
 int native_cpu_disable(void)
 {
-	int cpu = smp_processor_id();
-
-	/*
-	 * Perhaps use cpufreq to drop frequency, but that could go
-	 * into generic code.
-	 *
-	 * We won't take down the boot processor on i386 due to some
-	 * interrupts only being able to be serviced by the BSP.
-	 * Especially so if we're not using an IOAPIC	-zwane
-	 */
-	if (cpu == 0)
-		return -EBUSY;
-
 	clear_local_APIC();
 
 	cpu_disable_common();
-- 
1.7.2

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