Re: [PATCH 5/5] perf/x86: Add Intel Nehalem-EX uncore support

[Yan, Zheng]

On Thu, Jul 5, 2012 at 12:53 AM, Peter Zijlstra <a.p.zijlstra@xxxxxxxxx> wrote:
> On Thu, 2012-07-05 at 00:00 +0800, Yan, Zheng wrote:
>>
>> > Also, how can a single extra register require 192 bits of config space?
>> >
>> Some events in the M-Box and R-Box require programming up to 3 extra
>> registers. For example, the event 0x5 in the R-Box requires programming
>> extra registers XBR_SET1_MM_CFG, XBR_SET1_MATCH and XBR_SET1_MATCH.
>
> But shouldn't you then use 3 extra_reg instead of blowing up the one?
>
These 3 registers are within a logical set, are always used at the same time.
I think it's natural to use a single data structure to track them.

Regards
Yan, Zheng
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