Re: + nmi-watchdog-quiet-down-the-boot-messages.patch added to -mmtree

[Ingo Molnar]

* akpm@xxxxxxxxxxxxxxxxxxxx <akpm@xxxxxxxxxxxxxxxxxxxx> wrote:

> From: Don Zickus <dzickus@xxxxxxxxxx>
> Subject: nmi watchdog: quiet down the boot messages
> 
> A bunch of bugzillas have complained how noisy the nmi_watchdog is during
> boot-up especially with its expected failure cases (like virt and bios
> resource contention).
> 
> This is my attempt to quiet them down and keep it less confusing for the
> end user.  What I did is print the message for cpu0 and save it for future
> comparisons.  If future cpus have an identical message as cpu0, then don't
> print the redundant info.  However, if a future cpu has a different
> message, happily print that loudly.
> 
> Before the change, you would see something like:
> 
>     ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>     CPU0: Intel(R) Core(TM)2 Quad CPU    Q9550  @ 2.83GHz stepping 0a
>     Performance Events: PEBS fmt0+, Core2 events, Intel PMU driver.
>     ... version:                2
>     ... bit width:              40
>     ... generic registers:      2
>     ... value mask:             000000ffffffffff
>     ... max period:             000000007fffffff
>     ... fixed-purpose events:   3
>     ... event mask:             0000000700000003
>     NMI watchdog enabled, takes one hw-pmu counter.
>     Booting Node   0, Processors  #1
>     NMI watchdog enabled, takes one hw-pmu counter.
>      #2
>     NMI watchdog enabled, takes one hw-pmu counter.
>      #3 Ok.
>     NMI watchdog enabled, takes one hw-pmu counter.
>     Brought up 4 CPUs
>     Total of 4 processors activated (22607.24 BogoMIPS).

the problem really was that it didn't print which CPU it 
referred to - it just repeated the same message over and over 
again.

If it said:

     NMI watchdog enabled on CPU#0, takes one hw-pmu counter.

it would be far less confusing.

This:

> After the change, it is simplified to:
> 
>     ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>     CPU0: Intel(R) Core(TM)2 Quad CPU    Q9550  @ 2.83GHz stepping 0a
>     Performance Events: PEBS fmt0+, Core2 events, Intel PMU driver.
>     ... version:                2
>     ... bit width:              40
>     ... generic registers:      2
>     ... value mask:             000000ffffffffff
>     ... max period:             000000007fffffff
>     ... fixed-purpose events:   3
>     ... event mask:             0000000700000003
>     NMI watchdog enabled, takes one hw-pmu counter.
>     Booting Node   0, Processors  #1 #2 #3 Ok.
>     Brought up 4 CPUs

Is fine too but should be clarified to something like:

     NMI watchdog enabled on all CPUs, permanently consumes one hw-PMU counter

(Please note the capitalization of 'PMU' as well.)

Thanks,

	Ingo
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