Re: [PATCH] RAS: Add a tracepoint for reporting memory controllerevents

[Mauro Carvalho Chehab]

Em 31-05-2012 09:17, Borislav Petkov escreveu:
> On Thu, May 31, 2012 at 07:33:25AM -0300, Mauro Carvalho Chehab wrote:
>> Huh? Tony said that some errors report at 4K granularity while, others
>> are at cache line size.
> 
> Cacheline size is from MCE. This tracepoint is for memory controller
> errors where granularity should be pretty stable.

Both sb_edac and i7core_edac get errors via MCE. They're currently providing
a fake granularity, but I'm planning to add proper grain support on them,
by retrieving such information from the MCE registers.

Regards,
Mauro


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