Re: [PATCH 02/16] perf: Add ability to attach registers dump to sample

[Stephane Eranian]

On Thu, May 24, 2012 at 11:50 AM, Peter Zijlstra <a.p.zijlstra@xxxxxxxxx> wrote:
> On Wed, 2012-05-23 at 21:32 +0200, Jiri Olsa wrote:
>> Â/*
>> + * Values for sample_regs when PERF_SAMPLE_REGS is set.
>> + * Defines register set to be attached to the sample.
>> + */
>> +enum perf_sample_regs {
>> + Â Â Â PERF_SAMPLE_REGS_USER Â = 1U << 0, /* user registers */
>> + Â Â Â PERF_SAMPLE_REGS_MAX Â Â= 1U << 1, /* non-ABI */
>> +};
>
>
>
>> + Â Â Â __u64 Â sample_regs; /* enum perf_sample_regs */
>> +
>> + Â Â Â /*
>> + Â Â Â Â* Arch specific mask for PERF_SAMPLE_REGS_USER setup.
>> + Â Â Â Â* Defines set of user regs to dump on samples.
>> + Â Â Â Â* See asm/perf_regs.h for details.
>> + Â Â Â Â*/
>> + Â Â Â __u64 Â sample_regs_user;
>
> This all just smells.. :/
>
> So you're wasting 64 bits to specify PERF_SAMPLE_REGS_USER while also
> implying we'll need another u64 for every other value of
> perf_sample_regs?
>
> What are we doing here and why?
>
I think this is related to a discusion we had earlier about which
machine state you want
to sample.

There are 3 possible machine states:
  1- user level (even when sample is in kernel AND assuming you did
not hit a kernel only thread)
  2- interrupted state (@ PMU interrupt)
  3- precise state (state captured by PEBS on Intel, for instance)

Jiri is only interested in 1/. I am interested in the other two as well.

Question: is there a situation where we could need more than one machine
state per sample?

If not, then a single bitmask is enough.
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