Re: [PATCH 2/2] mfd: anatop: permit adata be NULL when accessregister

[Richard Zhao]

On Mon, May 14, 2012 at 09:26:57PM +0800, Ying-Chun Liu (PaulLiu) wrote:
> (2012å05æ14æ 17:43), Shawn Guo wrote:
> > On Mon, May 14, 2012 at 05:01:08PM +0800, Ying-Chun Liu (PaulLiu) wrote:
> >> I think what the concern is we probably don't want several
> >> non-continuous memory blocks of misc hardwares.
> >> If we look into the current registers in anatop, it is really sparse.
> >> Several regulators are using non-continuous address and the thermals are
> >> also using different addresses. If the addresses are continuous then we
> >> don't need the mfd driver.
> >>
> > I do not quite follow that.  The reason we need mfd driver isn't because
> > we do not want to both regulator and thermal drivers to map and access
> > the same address on their own which may have synchronization issue?
> > 
> 
> Not sure about the synchronization issue. But currently thermal driver
> in Linaro kernel do map and access the same address on its own now. It
> is not a device driver yet and just access the address directly and
> work. It seems to me that each different type of misc devices in Anatop
> just work alone.
> 
> So let's go back to the patch. Why do we need this modification? Anatop
> thermal driver can be written as a device driver and don't need this
> patch. And we might get benefits when thermal driver written in this
> way. Especially some boards do not have a correct fuse data. Any real
> use cases of this patch?
Some bits in anatop is not owned by any driver.
It's for below code:
        /* Some phy and power's special controls for host1           
         * 1. The external charger detector needs to be disabled
         * or the signal at DP will be poor                          
         * 2. The PLL's power and output to usb for host 1
         * is totally controlled by IC, so the Software only needs   
         * to enable them at initializtion.
         */ 
        
        anatop_write_reg(NULL, HW_ANADIG_USB2_CHRG_DETECT,           
                        BM_ANADIG_USB2_CHRG_DETECT_EN_B |
                        BM_ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,       
                        ~0);
        anatop_write_reg(NULL, HW_ANADIG_USB2_PLL_480_CTRL, 0,       
                        BM_ANADIG_USB2_PLL_480_CTRL_BYPASS);

        val = BM_ANADIG_USB2_PLL_480_CTRL_ENABLE |                   
              BM_ANADIG_USB2_PLL_480_CTRL_POWER |
              BM_ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS;               
        anatop_write_reg(NULL, HW_ANADIG_USB2_PLL_480_CTRL, val, val);

Thanks
Richard
> 
> Yours Sincerely,
> Paul
> 

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