[PATCH 0/4] Extend mwait idle to optimize away CAL and RES interrupts to an idle CPU -v2

[Venkatesh Pallipadi]

Addressed various comments to the previous version. I did have to avoid
x86 smpboot cleanup that Ingo suggested as that did not seem trivial to me :-).
I also separated out the change that does percpu idle task caching. That
change does provide a measurable gain to the IPI sender overhead.

Previous versions
* RFC - https://lkml.org/lkml/2012/2/6/357
* v1 - https://lkml.org/lkml/2012/2/22/512

Changes since previous versions:
RFC to v1
 Moved the changes into arch specific code as per PeterZ suggestion (Mostly)
 Got rid of new per cpu state logic in favor of TIF flag bits

v1 to v2
 Generic TS_POLLING cleanup
 Really really no change to generic code (other than TS_POLLING cleanup)
 Single bit in TIF flags. Had to get rid of micro optimization of avoiding
  second IPI to a CPU when there is already one pending, in favor of keeping
  code simple and faster in common case.
 Add irq_enter irq_exit around pending interrupt handlers
 Extended the optimization to cover C1 mwait() and poll_idle()
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