Re: [PATCH 02/15] PCI: Add iobusn_resource

From: Yinghai Lu
Date: Mon Feb 06 2012 - 13:48:41 EST

On Mon, Feb 6, 2012 at 9:14 AM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote:

> The current bus number allocation in pci_scan_bridge() is very simple
> -- we just add one to the highest-numbered bridge we've seen.  That
> works in many cases, but it means any holes in the range of used bus
> numbers are just wasted.
> Here's a case I tripped over where the current scheme fails.  The
> machine boots with bridge 00:03.0 to [bus 05-19].  Now we hot-add a
> hierarchy that is currently configured like this:
>      05:00.0 bridge to [bus 06-1e]
>      06:05.0 bridge to [bus 1c]
>      06:06.0 bridge to [bus 1d]
>      1c:00.0 NIC0
>      1d:00.0 NIC1
> [bus 1a-1e] is inaccessible because the 00:03.0 aperture only includes
> [bus 05-19].  There's plenty of space to reconfigure the hierarchy,
> e.g., to make 05:00.0 lead to [bus 06-19], 06:05.0 lead to [bus 18],
> and 06:06.0 lead to [bus 19].  But we aren't smart enough to do that.

Yes, this patchset will reject 05:00.0 bus setting from bios, and
assign it with 06-19.

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