Re: virtio-pci new configuration proposal

[Rusty Russell]

On Mon, 7 Nov 2011 23:14:14 +0200, "Michael S. Tsirkin" <mst@xxxxxxxxxx> wrote:
> On Mon, Nov 07, 2011 at 03:46:23PM +1030, Rusty Russell wrote:
> > So far, the only three things make sense to have in a capability list:
> > MSI-X, the upper 32 feature bits, and the per-device config.
> 
> You mean the queue # to MSI-X vector mapping?

Yep.

> One thing to remember is that it must be in the same type of BAR as
> the queue selection, since by PCI rules MMIO writes aren't I think
> ordered with PIO writes (it doesn't matter with KVM but might
> with another hypervisor).

OK, I'm slowly getting up to speed.

Next dumb q: Sasha, why did you introduce the idea of a separate
virtio-pci capability list, rather than just using PCI capabilities
directly?  ie. instead of VIRTIO_PCI_C_LAYOUT, have VIRTIO_PCI_CORE,
VIRTIO_PCI_MSIX, VIRTIO_PCI_DEV_SPECIFIC?

Is it because we really want this stuff outside the PCI configuration
space?  Even so, should we just use the PCI cap list, and have each
cap entry just contain a BIR & offset?

Thanks,
Rusty.

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