Re: virtio-pci new configuration proposal

[Michael S. Tsirkin]

On Wed, Nov 02, 2011 at 08:49:27PM +0200, Sasha Levin wrote:
> This is a proposal for a new layout of the virtio-pci config space.
> 
> We will separate the current configuration into two: A virtio-pci common
> configuration and a device specific configuration. This allows more flexibility
> with adding features and makes usage easier, specifically in cases like the
> ones in virtio-net where device specific configurations depend on device
> specific features.
> 
> The preferred location of the configuration will be a MMIO BAR, therefore
> several size optimizations such as the queue selector which were useful
> on a PIO BAR were removed and linked lists were introduced to add
> flexibility to existing structures in attempt to keep their size and
> offsets constant and not dependent on features.
> 
> While this is not a complete specification, it describes all the main
> structures and should be enough to make sure the idea is solid before
> going into implementation specifics.
> 
> A new virtio-pci capability structure will be introduced. This structure
> will be used to describe the basics of a virtio-pci device. The
> structure is actually a PCI capability structure which wraps the new virtio-pci
> capability structure:
> 
> +------------++------------+------------+------------+--------------+-----------------
> | Bits       || 8          | 8          | 8          | 8            | Cap specific
> +------------++------------+------------+------------+--------------+-----------------
> | Read/Write || R          | R          | R          | R            | Cap specific
> +------------++------------+------------+------------+--------------+-----------------
> | Purpose    || Capability | Capability | virtio-pci | virtio-pci   | Cap specific
> |            || ID         | Next PTR   | Cap ID     | Next Cap PTR |
> +------------++------------+------------+------------+--------------+-----------------
> 
> Currently, only one virtio-pci capability is defined, and is the one that defines
> the layout of the virtio-pci config space.
> 
> VIRTIO_PCI_C_LAYOUT:
> 
> +------------++---------------+---------------+-----------------+-----------------+
> | Bits       || 29            | 3             | 29              | 3               |
> +------------++---------------+---------------+-----------------+-----------------+
> | Read/Write || R             | R             | R               | R               |
> +------------++---------------+---------------+-----------------+-----------------+
> | Purpose    || Common config | Common config | Device specific | Device specific |
> |            || Offset        | BIR           | Offset          | BIR             |
> +------------++---------------+---------------+-----------------+-----------------+

I'm implementing a different layout, with
separate capabilities for common and device specific
fields.
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