Re: [Patch] Idle balancer: cache align nohz structure to improveidle load balancing scalability

From: Eric Dumazet
Date: Thu Oct 20 2011 - 02:43:48 EST


Le mercredi 19 octobre 2011 Ã 22:57 -0700, Suresh Siddha a Ãcrit :
> On Wed, 2011-10-19 at 21:18 -0700, Eric Dumazet wrote:
> > > + atomic_t load_balancer ____cacheline_aligned;
> > > + atomic_t first_pick_cpu ____cacheline_aligned;
> > > + atomic_t second_pick_cpu ____cacheline_aligned;
> > > + cpumask_var_t idle_cpus_mask ____cacheline_aligned;
> > > cpumask_var_t grp_idle_mask;
> > > unsigned long next_balance; /* in jiffy units */
> > > } nohz ____cacheline_aligned;
> > >
> >
> > Dont you increase cache footprint, say for an Uniprocessor machine ?
> >
> > (CONFIG_SMP=n)
> >
> > ____cacheline_aligned_in_smp seems more suitable in this case.
>
> I believe this code is already under ifdef CONFIG_SMP.

Right now yes, but it might change in the future after some code
cleanup / consolidation.

This kind of things are copy/pasted, and the right semantic here is
____cacheline_aligned_in_smp . It matches the changelog better.

Note: the ____cacheline_aligned on global "nohz" structure was quite
different, and in contradiction of what this patch wants to do.

Previously, we wanted to group all fields on a single cache line.
We now know it was not a scalable strategy, thanks to Tim.



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