[PATCH 1/3] ASoC: wm8900: Fix wrong mask for settingDAC_CLKDIV/ADC_CLKDIV/LRCLK_MODE

[Axel Lin]

After checking the datasheet, I think what we want to do here is to
clear the WM8900_REG_CLOCKING2_DAC_CLKDIV/WM8900_REG_CLOCKING2_ADC_CLKDIV/
WM8900_REG_DACCTRL_AIF_LRCLKRATE bits and then OR with div value.

Signed-off-by: Axel Lin <axel.lin@xxxxxxxxx>
---
I'd appreciate if someone can test this serial of patches.
Thanks,
Axel
 sound/soc/codecs/wm8900.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/sound/soc/codecs/wm8900.c b/sound/soc/codecs/wm8900.c
index 082040e..b16522f 100644
--- a/sound/soc/codecs/wm8900.c
+++ b/sound/soc/codecs/wm8900.c
@@ -844,17 +844,17 @@ static int wm8900_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
 	case WM8900_DAC_CLKDIV:
 		reg = snd_soc_read(codec, WM8900_REG_CLOCKING2);
 		snd_soc_write(codec, WM8900_REG_CLOCKING2,
-			     div | (reg & WM8900_REG_CLOCKING2_DAC_CLKDIV));
+			     div | (reg & ~WM8900_REG_CLOCKING2_DAC_CLKDIV));
 		break;
 	case WM8900_ADC_CLKDIV:
 		reg = snd_soc_read(codec, WM8900_REG_CLOCKING2);
 		snd_soc_write(codec, WM8900_REG_CLOCKING2,
-			     div | (reg & WM8900_REG_CLOCKING2_ADC_CLKDIV));
+			     div | (reg & ~WM8900_REG_CLOCKING2_ADC_CLKDIV));
 		break;
 	case WM8900_LRCLK_MODE:
 		reg = snd_soc_read(codec, WM8900_REG_DACCTRL);
 		snd_soc_write(codec, WM8900_REG_DACCTRL,
-			     div | (reg & WM8900_REG_DACCTRL_AIF_LRCLKRATE));
+			     div | (reg & ~WM8900_REG_DACCTRL_AIF_LRCLKRATE));
 		break;
 	default:
 		return -EINVAL;
-- 
1.7.4.1



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