Re: [PATCH 3/4] perf, x86: Add Intel SandyBridge pricise storesupport

[Peter Zijlstra]

On Mon, 2011-07-04 at 08:02 +0000, Lin Ming wrote:
> Implements Intel memory store event for SandyBridge.
> 
> $ perf mem -t store record make -j8


I was just looking through the Intel SDM, and stumbled upon:

C0H	01H	INST_RETIRED.PREC_DIST

Precise instruction retired event
with HW to reduce effect of PEBS
shadow in IP distribution PMC1 only; 
Must quiesce other PMCs.
^^^^^^^^^^^^^^^^^^^^^^^^

WTF!? Are they real? The implementation as provided by you doesn't do
that (quite understandably), but please check with the hardware folks.

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/