Re: [PATCH v1 5/5] KVM: Expose a version 1 architectural PMU toguests

From: Peter Zijlstra
Date: Fri Jun 03 2011 - 10:42:08 EST


On Wed, 2011-05-11 at 11:55 -0400, Avi Kivity wrote:
> - counters that have PMI (interrupt) enabled stop counting after the
> interrupt is signalled. This is because we need one-shot samples
> that keep counting, which perf doesn't support yet

You'll have to reprogram the thing anyway, since not all hardware has
the same counter width:

[ 0.046996] Performance Events: AMD PMU driver.
[ 0.048998] ... bit width: 48

vs

[ 0.026998] Performance Events: PEBS fmt0+, Core2 events, Intel PMU driver.
[ 0.026998] ... bit width: 40

simply letting the thing run will not behave in a consistent fashion.

Or are you going to assume all software will properly read the cpuid
leaf and not assume bit width?

Also, I can't seem to locate where you fill that cpuid-leaf,
kvm_pmu_cpuid_update() seems to read the entry, not write it.
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