[PATCH] x86, AMD: K8 Rev.A-E processors are subject to erratum 400

From: Boris Ostrovsky
Date: Fri Apr 29 2011 - 17:50:25 EST


Older AMD K8 processors (Revisions A-E) are affected by erratum 400
(APIC timer interrupts don't occur in C states greater than C1). This,
for example, means that X86_FEATURE_ARAT flag should not be set for
these parts.

This addresses regression introduced by commit
b87cf80af3ba4b4c008b4face3c68d604e1715c6 ("x86, AMD: Set ARAT feature
on AMD processors") where the system may become unresponsive until
external interrupt (such as keyboard input) occurs. This results, for
example, in time not being reported correctly, lack of progress on the
system and other lockups.

Signed-off-by: Boris Ostrovsky <Boris.Ostrovsky@xxxxxxx>
Acked-by: Borislav Petkov <borislav.petkov@xxxxxxx>
Reported-by: Joerg-Volker Peetz <jvpeetz@xxxxxx>
Tested-by: Joerg-Volker Peetz <jvpeetz@xxxxxx>
Cc: stable@xxxxxxxxxx

---
arch/x86/kernel/cpu/amd.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 3532d3b..71499b4 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -698,7 +698,7 @@ cpu_dev_register(amd_cpu_dev);
*/

const int amd_erratum_400[] =
- AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf),
+ AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x4, 0x2, 0xff, 0xf),
AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf));
EXPORT_SYMBOL_GPL(amd_erratum_400);

--
1.7.3.4

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