Re: [PATCH V2 7/7] dmaengine/dw_dmac: implement pause and resume indwc_control

[Jamie Iles]

On Tue, Apr 19, 2011 at 02:02:12PM +0530, Viresh Kumar wrote:
> From: Linus Walleij <linus.walleij@xxxxxxxxxx>
> 
> Some peripherals like amba-pl011 needs pause to be implemented in DMA controller
> drivers. This also returns correct status from dwc_tx_status() in case chan is
> paused.
> 
> Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
> Signed-off-by: Viresh Kumar <viresh.kumar@xxxxxx>
> ---
>  drivers/dma/dw_dmac.c      |   25 +++++++++++++++++++++++--
>  drivers/dma/dw_dmac_regs.h |    1 +
>  2 files changed, 24 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
> index c30f0ba..48d2d7e 100644
> --- a/drivers/dma/dw_dmac.c
> +++ b/drivers/dma/dw_dmac.c
> @@ -832,8 +832,7 @@ static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
>  	struct dw_desc		*desc, *_desc;
>  	LIST_HEAD(list);
>  
> -	/* Only supports DMA_TERMINATE_ALL */
> -	if (cmd != DMA_TERMINATE_ALL)
> +	if (cmd != DMA_TERMINATE_ALL && cmd != DMA_PAUSE && cmd != DMA_RESUME)
>  		return -ENXIO;
>  
>  	/*
> @@ -844,11 +843,30 @@ static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
>  	 */
>  	spin_lock_irqsave(&dwc->lock, dwc->lflags);
>  
> +	if (cmd == DMA_RESUME) {
> +		if (dwc->paused) {
> +			channel_set_bit(dw, CH_EN, dwc->mask);
> +			while (!(dma_readl(dw, CH_EN) & dwc->mask))
> +				cpu_relax();
> +		}
> +		spin_unlock_irqrestore(&dwc->lock, dwc->lflags);
> +		return 0;
> +	}
> +
>  	channel_clear_bit(dw, CH_EN, dwc->mask);
>  
>  	while (dma_readl(dw, CH_EN) & dwc->mask)
>  		cpu_relax();
>  
> +	if (cmd == DMA_PAUSE) {
> +		dwc->paused = true;
> +		spin_unlock_irqrestore(&dwc->lock, dwc->lflags);
> +		return 0;
> +	}

>From the Synopsys datasheet it looks to me like pausing by clearing the 
channel enable bit could cause data to be lost.  I think you need to set 
the CH_SUSP bit and wait for the FIFO_EMPTY flag to go high then disable 
the channel.

Jamie
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