Re: [PATCH -tip] perf, x86: fix unknown NMIs on a Pentium4 box

[Cyrill Gorcunov]

On 04/14/2011 09:43 PM, Ingo Molnar wrote:
...
>>
>>  	handled = x86_pmu.handle_irq(args->regs);
>> +
>> +	/*
>> +	 * Note the unmasking of LVTPC entry must be
>> +	 * done *after* counter oveflow flag is cleared
>> +	 * otherwise it might lead to double NMIs generation.
>> +	 */
>> +	apic_write(APIC_LVTPC, APIC_DM_NMI);
>> +
>>  	if (!handled)
>>  		return NOTIFY_DONE;
>>
> 
> This breaks 'perf top' on Intel Nehalem and probably other CPUs. The NMI gets 
> stuck fast on all CPUs:
> 
>   NMI: 16 6 3 3 3 3 3 3 3 3 3 3 3 3 4 5 Non-maskable interrupts
> 
> Thanks,
> 
> 	Ingo

Hmm. Thanks for info. Investigating...

-- 
    Cyrill
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