[tip:perf/core] perf, x86: P4 PMU - clean up the code a bit

[tip-bot for Cyrill Gorcunov]

Commit-ID:  1d321881afb955bba1e0a8f50d3a04e111fcb581
Gitweb:     http://git.kernel.org/tip/1d321881afb955bba1e0a8f50d3a04e111fcb581
Author:     Cyrill Gorcunov <gorcunov@xxxxxxxxxx>
AuthorDate: Mon, 28 Mar 2011 00:46:11 +0400
Committer:  Ingo Molnar <mingo@xxxxxxx>
CommitDate: Tue, 29 Mar 2011 09:36:33 +0200

perf, x86: P4 PMU - clean up the code a bit

No change on the functional level, just align the table properly.

Signed-off-by: Cyrill Gorcunov <gorcunov@xxxxxxxxxx>
Cc: Lin Ming <ming.m.lin@xxxxxxxxx>
LKML-Reference: <4D8FA213.5050108@xxxxxxxxxx>
Signed-off-by: Ingo Molnar <mingo@xxxxxxx>
---
 arch/x86/kernel/cpu/perf_event_p4.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index c2520e1..8ff882f 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -468,7 +468,7 @@ static struct p4_event_bind p4_event_bind_map[] = {
 		.opcode		= P4_OPCODE(P4_EVENT_MISPRED_BRANCH_RETIRED),
 		.escr_msr	= { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
 		.escr_emask	=
-		P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS),
+			P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS),
 		.cntr		= { {12, 13, 16}, {14, 15, 17} },
 	},
 	[P4_EVENT_X87_ASSIST] = {
--
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