Re: [EDAC-AMD64] Display correct RAM sizes in ganged mode on F10CPUs

[Borislav Petkov]

On Thu, Feb 03, 2011 at 12:25:39PM -0500, Markus Trippelsdorf wrote:
> Looks good, many thanks Boris.
> 
> EDAC amd64: F10h detected (node 0).
> EDAC MC: DCT0 chip selects:
> EDAC amd64: MC: 0:  1024MB 1:  1024MB
> EDAC amd64: MC: 2:  1024MB 3:  1024MB
> EDAC amd64: MC: 4:     0MB 5:     0MB
> EDAC amd64: MC: 6:     0MB 7:     0MB
> EDAC MC: DCT1 chip selects:
> EDAC amd64: MC: 0:  1024MB 1:  1024MB
> EDAC amd64: MC: 2:  1024MB 3:  1024MB
> EDAC amd64: MC: 4:     0MB 5:     0MB
> EDAC amd64: MC: 6:     0MB 7:     0MB

Ok thanks, will add your Tested-by: too.

> BTW another thing, while I have your attention:
> 
> cat /sys/devices/system/edac/mc/mc0/csrow0/edac_mode
> prints "S4ECD4ED" aka Chipkill on my system.
> But I'm using a revision C Phenom that only supports a x4 symbol size,
> while the Kingston ECC DIMMs have a width of x8. So according to
> table 77 (page 174) of the "BIOS and Kernel Developerâs Guide" the
> system is actually running in SECDED mode and does not provide Chipkill.

Yeah, that table needs to be implemented for proper csrow->edac_mode
assignment. I'll try to get it done soon.

Thanks.

-- 
Regards/Gruss,
Boris.

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