Re: [PATCH] ARM: vfp: Fix up exception location in Thumb mode

[Catalin Marinas]

On 15 January 2011 15:40, Russell King - ARM Linux
<linux@xxxxxxxxxxxxxxxx> wrote:
> On Sat, Jan 15, 2011 at 03:31:04PM +0000, Catalin Marinas wrote:
>> On 14 January 2011 17:30, Russell King - ARM Linux
>> <linux@xxxxxxxxxxxxxxxx> wrote:
>> > +@ Âr9 Â= normal "successful" return address
>> > Â@ Âr10 = vfp_state union
>> > Â@ Âr11 = CPU number
>> > -@ Âlr Â= failure return
>> > -
>> > +@ Âlr Â= unrecognised instruction return address
>> > +@ ÂIRQs enabled.
>> > ÂENTRY(vfp_support_entry)
>> > Â Â Â ÂDBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10
>> >
>> > @@ -138,9 +138,12 @@ check_for_exception:
>> > Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â@ exception before retrying branch
>> > Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â@ out before setting an FPEXC that
>> > Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â@ stops us reading stuff
>> > - Â Â Â VFPFMXR FPEXC, r1 Â Â Â Â Â Â Â @ restore FPEXC last
>> > -    sub   r2, r2, #4
>> > -    str   r2, [sp, #S_PC]     @ retry the instruction
>> > + Â Â Â VFPFMXR FPEXC, r1 Â Â Â Â Â Â Â @ Restore FPEXC last
>> > +    sub   r2, r2, #4       Â@ Retry current instruction - if Thumb
>> > +    str   r2, [sp, #S_PC]     @ mode it's two 16-bit instructions,
>> > + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â @ else it's one 32-bit instruction, so
>> > + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â @ always subtract 4 from the following
>> > + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â @ instruction address.
>>
>> I would say it's always a 32-bit instruction but made up of two 16-bit
>> values to allow half-word alignment.
>
> Do you have a suggested replacement text?

Maybe something like: Retry the current VFP instruction (32-bit in
both ARM and Thumb modes).

(I was wondering whether we can get on the above code path with
asynchronous VFP exceptions where the interrupted instruction may not
be the VFP one. But I think all Thumb-2 processors these days generate
synchronous exceptions)

-- 
Catalin
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