Re: [PATCH] watchdog: Add driver for Altera Watchdog Timer

[Jamie Iles]

On Wed, Jan 12, 2011 at 01:36:37PM +0100, Tobias Klauser wrote:
[...]
> > > +static long altera_wdt_ioctl(struct file *file, unsigned int cmd,
> > > +		unsigned long arg)
> > > +{
> > > +	struct altera_wdt_dev *wdev = file->private_data;
> > > +	void __user *argp = (void __user *) arg;
> > > +
> > > +	switch (cmd) {
> > > +	case WDIOC_GETSUPPORT:
> > > +		return copy_to_user(argp, &altera_wdt_info, sizeof(altera_wdt_info));
> > > +	case WDIOC_KEEPALIVE:
> > > +		altera_wdt_ping(wdev);
> > > +		return 0;
> > > +	default:
> > > +		return -ENOTTY;
> > > +	}
> > > +}
> > 
> > Can you set/get the timeout period on this watchdog?  Even if you can't 
> > set it then it would be good to allow the user to read the constant 
> > timeout that the watchdog uses so it knows how often to kick it.  If you 
> > use the software timeout heartbeat then in the future you could emulate 
> > longer timeouts.
> 
> This is a very primitive watchdog timer which does only allow the
> timeout period to be set when instantiating the timer in the FPGA, so
> from a software point-of-view the timer has a fixed timeout. It doesn't
> even allow to read the timeout value directly from the "hardware".
> 
> But we could use the additional information (including the timeout value
> among a lot of other configurable values) generated when building the
> FPGA firmware and store that in the device tree (support for device tree
> was recently added to the Nios2 Linux port). So we could get it (and
> the base address) from there in the altera_wdt driver. Does that sound
> reasonable?

That sounds like a very good idea to me.  I can see that allowing 
userspace to know the timeout period would be useful.

Jamie
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