Re: [PATCH] tracing: Cleanup the convoluted softirq tracepoints

[Steven Rostedt]

On Mon, 2010-10-25 at 18:55 -0400, Mathieu Desnoyers wrote:
> * H. Peter Anvin (hpa@xxxxxxxxx) wrote:
> > On 10/25/2010 03:01 PM, Mathieu Desnoyers wrote:
> > > * H. Peter Anvin (hpa@xxxxxxxxx) wrote:
> > >> On 10/20/2010 08:27 AM, Jason Baron wrote:
> > >>>
> > >>> sure. The idea of the 'jmp 0' was simply to be an lcd for x86, if
> > >>> there's a better lcd for x86, I'll update it. But note, that since the
> > >>> 'jmp 0' is patched to a better nop at boot, we wouldn't see much gain.
> > >>> And in the boot path we are using 'text_poke_early()', so avoiding that
> > >>> isn't going to improve things much.
> > >>>
> > >>
> > >> It's still a completely unnecessary waste of startup time some
> > >> potentially significant fraction of the time.  Startup time matters,
> > >> especially as the number of tracepoints grow.
> > > 
> > > We're still waiting for input for the best single-5-byte-instruction nop that
> > > will work on all x86 variants. Please note that the GENERIC_NOP5 is actually two
> > > instructions one next to each other, which is not appropriate here.
> > > 
> > 
> > On 64 bits, use P6_NOP5; it seems to not suck on any platform.
> > 
> > On 32 bits, 3E 8D 74 26 00 (i.e. DS: + GENERIC_NOP4) seems to at least
> > do okay.
> > 
> > I can't say these are the *best* (in fact, they are guaranteed not the
> > best on some significant number of chips), but they haven't sucked on
> > any chips I have been able to measure -- and are way faster than JMP.
> 
> Cool, thanks for the info! Steven and Jason should probably update their
> respective infrastructure to use the 32-bit 5-byte nop you propose rather than
> the 5-byte jump.

Actually, I was thinking that we could take any 5 byte nop. The
alternate code is executed _before_ SMP is enabled. Thus we should not
have any cases where something could be executing in midstream.

-- Steve


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