Re: [PATCH v6 06/12] Add PV MSR to enable asynchronous page faultsdelivery.

[Avi Kivity]

 On 10/04/2010 05:56 PM, Gleb Natapov wrote:
> +
> +	Physical address points to 32 bit memory location that will be written
> +	to by the hypervisor at the time of asynchronous page fault injection to
> +	indicate type of asynchronous page fault. Value of 1 means that the page
> +	referred to by the page fault is not present. Value 2 means that the
> +	page is now available.

"The must not enable interrupts before the reason is read, or it may be 
overwritten by another apf".

Document the fact that disabling interrupts disables APFs.

How does the guest distinguish betweem APFs and ordinary page faults?

What's the role of cr2?

When disabling APF, all pending APFs are flushed and may or may not get 
a completion.

Is a "page available" notification guaranteed to arrive on the same vcpu 
that took the "page not present" fault?

--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.

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