Re: [PATCH] regulator: max8649 - fix setting extclk_freq

[Axel Lin]

2010/10/1 Mark Brown <broonie@xxxxxxxxxxxxxxxxxxxxxxxxxxx>:
> On Fri, Oct 01, 2010 at 01:56:27PM +0800, Axel Lin wrote:
>> The SYNC bits are BIT6 and BIT7 of MAX8649_SYNC register.
>> pdata->extclk_freq could be [0|1|2].
>> (MAX8649_EXTCLK_26MHZ|MAX8649_EXTCLK_13MHZ|MAX8649_EXTCLK_19MHZ)
>> It requires to left shift 6 bits to properly set extclk_freq.
>>
>> Signed-off-by: Axel Lin <axel.lin@xxxxxxxxx>
>
> Are there existing users of the driver?  It's not always 100% clear if
> people are expecting bitfield values that will be shifted in or values
> that can be ored directly in.  I don't really mind either way but I'd
> rather be careful.
>
I think I should explain this way:

In max8649.h , we have
enum {
        MAX8649_EXTCLK_26MHZ = 0,
        MAX8649_EXTCLK_13MHZ,
        MAX8649_EXTCLK_19MHZ,   /* 19.2MHz */
};

Thus, I think users will set
extclk_freq = MAX8649_EXTCLK_26MHZ;
but not
extclk_freq = (MAX8649_EXTCLK_26MHZ << 6);

Regards,
Axel
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