Re: ioremap definition in generic io.h

[Jonas Bonn]

On Thu, 2010-09-30 at 13:45 +0200, Arnd Bergmann wrote:
> On Wednesday 29 September 2010, Jonas Bonn wrote:
> > On another note, looking at the definitions of ioread32/iowrite32, they
> > imply a little-endian bus.  Some architectures (e.g. Microblaze) define
> > these to use host-native byte ordering instead.  Is there a correct
> > way these functions should be defined?
> 
> ioread32/iowrite32 are accessor functions for PCI byte order which is
> little endian. If microblaze does this differently, that is a microblaze
> bug. Any code that needs big-endian I/O should use ioread32be/iowrite32be.
> 

So what's the correct way to do host-native access?  For example, big
endian access on a big endian processor.  I think I'm missing something
fundamental here...

/Jonas

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