[PATCH] perf, x86: catch spurious interrupts after disablingcounters

From: Robert Richter
Date: Wed Sep 15 2010 - 12:21:15 EST


On 14.09.10 19:41:32, Robert Richter wrote:
> I found the reason why we get the unknown nmi. For some reason
> cpuc->active_mask in x86_pmu_handle_irq() is zero. Thus, no counters
> are handled when we get an nmi. It seems there is somewhere a race
> accessing the active_mask. So far I don't have a fix available.
> Changing x86_pmu_stop() did not help:

The patch below for tip/perf/urgent fixes this.

-Robert