On noncoherent processors with a readahead cache, an extra platform-[...]
specific invalidation is required during the dma_sync_*_for_cpu()
operations to keep drivers from seeing stale prefetched data.
Signed-off-by: Kevin Cernekee<cernekee@xxxxxxxxx>
---
.../include/asm/mach-cavium-octeon/dma-coherence.h | 13 +++++++++++++
arch/mips/include/asm/mach-generic/dma-coherence.h | 13 +++++++++++++
arch/mips/include/asm/mach-ip27/dma-coherence.h | 13 +++++++++++++
arch/mips/include/asm/mach-ip32/dma-coherence.h | 13 +++++++++++++
arch/mips/include/asm/mach-jazz/dma-coherence.h | 13 +++++++++++++
.../mips/include/asm/mach-loongson/dma-coherence.h | 13 +++++++++++++
arch/mips/include/asm/mach-powertv/dma-coherence.h | 13 +++++++++++++
arch/mips/mm/dma-default.c | 3 +++
8 files changed, 94 insertions(+), 0 deletions(-)