On noncoherent processors with a readahead cache, an extra platform-
specific invalidation is required during the dma_sync_*_for_cpu()
operations to keep drivers from seeing stale prefetched data.
Signed-off-by: Kevin Cernekee<cernekee@xxxxxxxxx>[...]
diff --git a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h b/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
index 17d5794..8192683 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
@@ -52,6 +52,19 @@ static inline void plat_extra_sync_for_device(struct device *dev)
mb();
}
+static inline void plat_extra_sync_for_cpu(struct device *dev,
+ dma_addr_t dma_handle, unsigned long offset, size_t size,
+ enum dma_data_direction direction)
+{
+ return;